Embedded instrumentation
In the electronics industry, embedded instrumentation refers to the integration of test and measurement instrumentation into semiconductor chips (or integrated circuit devices). Embedded instrumentation differs from embedded system, which are electronic systems or subsystems that usually comprise the control portion of a larger electronic system. Instrumentation embedded into chips (embedded instrumentation) is employed in a variety of electronic test applications, including validating and testing chips themselves, validating, testing and debugging the circuit boards where these chips are deployed, and troubleshooting systems once they have been installed in the field.
A working group of the IEEE (Institute of Electrical and Electronics Engineers) that is developing a standard for accessing embedded instruments (the IEEE 1687 Internal JTAG standard) defines embedded instrumentation as follows:
Any logic structure within a device whose purpose is Design for Test (DFT), Design-for-Debug (DFD), Design-for-Yield (DFY), Test... There exists the widespread use of embedded instrumentation (such as BIST (built-in self-test) Engines, Complex I/O Characterization and Calibration, Embedded Timing Instrumentation, etc.).
History
Dating back to as early as the 1990s, the electronics industry recognized that design validation, test and debug would be seriously impeded in the near future. Initially, the impetus behind this recognition and the subsequent development of solutions was the emergence of new semiconductor chip packages such as the ball grid array (BGA) which placed the device's pins beneath the silicon die, making them inaccessible to physical contact with an instrument's or a test system's metal probes. At that time, most test instruments, such as the oscilloscope and logic analyzers in design, and in-circuit test (ICT) in volume manufacturing were external to the chips and circuit boards. They relied upon placing a probe on a chip or a circuit board to obtain test data. To overcome the disappearing access for test probes, instrumentation technology began to be embedded into semiconductors and onto printed circuit boards.
In recent years, this situation has been exacerbated by increasingly high-speed serial inter-chip connections (interconnects or buses) on circuit boards as well as by even more complex chip packaging technologies like system-on-a-chip (SOC), system-in-package (SIP) and package-on-package (POP). These and other developments are making instrumentation embedded into chips a necessity for design validation, test and debug processes.
The Boundary Scan Standard (IEEE 1149.1 JTAG): The Enabling Technology for Embedded Instrumentation
Although it was not referred to as an embedded instrument at the time of its development, the IEEE 1149.1 Boundary Scan Standard can be seen as the first enabling technology for embedded instrumentation. (Boundary scan is also referred to as JTAG, after the Joint Test Action Group which initially undertook its development before it came under the aegis of a working group of the IEEE. ‘JTAG’ is often used to designate the access port on a chip which conforms to the boundary-scan standard.) Some would consider the boundary-scan test process as a form of embedded instrumentation. Boundary scan involves embedding an instrumentation infrastructure into chips and onto circuit boards. This infrastructure can be utilized during design debug and first prototype board bring-up, volume manufacturing and field service to test and diagnose the structural integrity of electrical connections on circuit boards. In addition, the boundary scan infrastructure can also be applied to the programming of devices such as memories, complex programmable logic devices (CPLDs) and Field-programmable gate arrays (FPGAs) after they have been soldered to a circuit board.
Related Standards
In the intervening years since the development of boundary-scan standard as a structural test technology, the embedded boundary-scan infrastructure in chips and on circuit boards has been appropriated for a number of related applications, including as an access method to the instrumentation inserted in chips. A later standard in the boundary-scan family, the IEEE 1149.6 Boundary-Scan Standard for Advanced Digital Networks, utilizes the 1149.1 boundary-scan embedded instrumentation infrastructure but expands the types of chip-to-chip interconnects that can be tested. Whereas the 1149.1 standard defines a methodology for testing DC-coupled interconnects, the 1149.6 version of the boundary-scan standard extends the methodology to testing high-speed AC coupled and/or differential interconnects.
Another addition to the boundary-scan family of standards has been IEEE 1149.7, which defines a reduced pin-count interface and provides for enhanced software debug. In addition, IEEE 1149.7 is expected to be used in the testing of complex chips with multiple die stacked in one package.
A working group of the IEEE has also undertaken the development of a standard that specifically addresses embedded instrumentation. The official name of this standard is the IEEE 1687 Standard for Access and Control of Instrumentation Embedded within a Semiconductor Device, but it is commonly referred to as the Internal JTAG (IJTAG) standard. The objective of the working group has been to define a technology for automating, accessing and analyzing the output of embedded instruments. Standardizing the interface to embedded instruments means that these instruments could come from any number of sources, but user interaction would be simplified since this would be based on an industry-accepted standard. The actual embedded instruments could be developed by any of several different types of groups, including chip suppliers, third-party providers, chip design tool vendors or in-house design groups. The availability of chips that conform to the IEEE 1687 standard would encourage the development of standards-based tools for interacting with and utilizing the instrumentation embedded in the chips. The IEEE 1687 standard is now a ratified standard.
The emergence of embedded instrumentation
Embedded instrumentation can perform certain functions that external test and measurement technologies have difficulty with because they are external to the chip or circuit board being tested. Moreover, embedded instrumentation is often more efficient and adaptable, since it is software-based, unlike external hardware testers. In addition, embedded instrumentation is simply better suited to much of the computer and communications technologies that are emerging today.
Some of the more traditional test and measurement technologies are only able to measure performance and data flow at the input/output (I/O) point on a chip. The real challenge is for the instrument to gain visibility into the processing that is going on inside the core silicon itself. To do this, embedded instruments are needed between the I/O point on the perimeter of the chip and the processing core.
The following are some of the difficulties that traditional test and measurement instruments are running into as chips, circuit boards and systems continue to become faster, smaller and more complex.
- The signaling on high-speed serial buses like PCI Express, Fibre Channel 10-Gbit/s Ethernet, InfiniBand or Intel®’s QuickPath Interconnect (QPI) is very sensitive to capacitive coupling effects. As a result, placing a test pad on one of these buses to provide access to the test probes that external instruments such as oscilloscopes and in-circuit test systems rely on will disrupt the integrity of signals on the underlying bus. As a result, today's best practices for designing circuit boards call for the elimination of test pads, which restricts the use of test probes. The alternative is embedded instruments which are able to test from the inside out.
- Semiconductor vendors are incorporating signaling conditioning features such as pre-conditioning, pre-emphasis and equalization into their devices to help move signals at higher frequencies. Unfortunately, these techniques make it more difficult for traditional external instruments to take accurate measurements.
- Sub-100 nanometer chip fabrication processes have dramatic effects on device-level parametric performance characteristics to the extent that traditional characterization and testing techniques are often ineffective at identifying problems. External instruments at the corners of a chip cannot see the variations across the chip. On-chip or embedded instruments can effectively monitor parametric characteristics such as thermal conditions, timing issues, clock propagation delays, power distribution and others.
- External instruments typically only measure signal integrity margins on one or a few high-speed serial lanes at a time. Embedded instrumentation technologies such as Intel's IBIST (Interconnect Built-In Self Test) can test and measure all lanes on all buses concurrently. This makes the test more robust and more complete, and it reduces the amount of time required to validate the system.
- Embedded instrumentation can perform design validation, test and debug routines that external validation and test technologies cannot. An example of this would be Intel's IBIST technology which can stress and thereby test high-speed I/O buses well beyond the capabilities of traditional testing techniques that are applied through an operating system.
Embedded instrumentation applications
The applications for embedded instrumentation are extensive. At the level of circuit boards, two of the most prominent applications are design validation and non-intrusive board test.
Chip and Circuit Board Design Validation
Instruments are being embedded into chips and utilized to validate circuit board designs. This sort of design validation can make use of a variety of embedded instruments such as bit error rate test (BERT) engines, BIST) for logic devices, margining engines, memory BIST, memory test, random pattern generators and a complete logic analyzer. Deployed in design validation applications, these embedded instruments may function inside the chip or across on-board chip-to-chip interconnects to validate the performance and functionality of a circuit board design before it moves into volume production.
Non-Intrusive Board Test
Non-intrusive board test (NBT) employs embedded instrumentation to perform structural and electrical tests on circuit boards. In addition to boundary scan, other types of NBT methods include processor-controlled test (PCT) and FPGA-controlled test (FCT). See below for more on these methodologies.
Embedded instrumentation methodologies
As mentioned above, the IEEE 1149.1 Boundary-Scan Standard could be seen as the first enabler of embedded instrumentation and, as such, the first embedded instrumentation methodology. In addition to providing the infrastructure for accessing and operating embedded instruments, tests that utilize the boundary scan infrastructure can be applied to circuit boards to identify structural defects such as shorts and opens. Several other methodologies also apply tests that are initiated by embedded instruments.
- High-speed I/O (HSIO): In particular, Intel Corporation has developed embedded instrumentation technology which it is placing in all of its advanced processors. This can be employed to validate signal integrity on the high-speed buses in the Intel® Architecture (IA).
- Processor-controlled test (PCT): PCT takes advantage of the debug port on most processor chips and asserts test and diagnostic routines on other elements on the circuit board, such as devices and the chip-to-chip buses.
- FPGA-controlled test (FCT):' Instruments are temporarily embedded into a field programmable gate array (FPGA) device on a circuit board to accomplish FCT tests. The types of tests performed will depend on the test functionality of the instruments embedded into the FPGA. Once the tests have been completed, the FCT embedded instruments can be removed and operating firmware loaded into the FPGA.